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技术资料 Data

MTB33N10E的技术资料

来源:汕头市创世纪电子发展有限公司; (2009/4/16 15:50:24)

MTB33N10E的产品特征：
• Avalanche Energy Specified
• Source–to–Drain Diode Recovery Time Comparable to a Discrete Fast Recovery Diode
• Diode is Characterized for Use in Bridge Circuits
• I_DSSand V_DS(on) Specified at Elevated Temperature
• Short Heatsink Tab Manufactured — Not Sheared
• Specially Designed Leadframe for Maximum Power Dissipation
• Available in 24 mm 13–inch/800 Unit Tape & Reel, Add T4 Suffix to Part Number

以上信息由『维库电子开发网』（www.weeqoo.com）整理。

MTB33N10E的技术参数：

Rating	Symbol	Value	Unit
Drain–to–Source Voltage	V_DSS	100	Vdc
Drain–to–Gate Voltage (R_GS= 1.0 MΩ)	V_DGR	100	Vdc
Gate–to–Source Voltage — Continuous — Non–Repetitive (t_p ≤ 10 ms)	V_GS V_GSM	± 20 ± 40	Vdc Vpk
Drain Current — Continuous — Continuous @ 100℃ — Single Pulse (t_p ≤ 10 μs)	I_D I_D I_DM	33 20 99	Adc Apk
Total Power Dissipation Derate above 25℃Total Power Dissipation @ T_A = 25℃, when mounted with the minimum recommended pad size	P_D	125 1.0 2.5	Watts W/℃ Watts
Operating and Storage Temperature Range	T_J, T_stg	– 55 to 150	℃
Single Pulse Drain–to–Source Avalanche Energy — Starting T_J = 25℃ (V_DD = 25Vdc, V_GS = 10 Vdc, Peak I_L= 33Apk, L = 1.000mH, R_G= 25 Ω)	E_AS	545	mJ
Thermal Resistance — Junction to Case — Junction to Ambient — Junction to Ambient, when mounted with the minimum recommended pad size	R_θJC R_θJA R_θJA	1.0 62.5 50	℃/W
Maximum Lead Temperature for Soldering Purposes, 1/8"from case for 10 seconds	T_L	260	℃

Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.

E–FET and Designer’s are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.

Thermal Clad is a trademark of the Bergquist Company.

资料整理：维库电子开发网（www.weeqoo.com），的芯片PDF资料基地。

MTB33N10E的产品描述：

The D²PAK package has the capability of housing a larger die than any existing surface mount package which allows it to be used in applications that require the use of surface mount components with higher power and lower R_DS(on) capabilities. This advanced TMOS E–FET is designed to withstand high energy in the avalanche and commutation modes. The new energy efficient design also offers a drain–to–source diode with a fast recovery time. Designed for low voltage, high speed switching applications in power supplies, converters and PWM motor controls, these devices are particularly well suited for bridge circuits where diode speed and commutating safe operating areas are critical and offer additional safety margin against unexpected voltage transients.

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